Pentium^® Pro/Pentium^® II Differences

The following is a list of differences between the Pentium® Pro the Pentium® processors:

• Intel® switched from using PGA (Pin Grid Array) packaging to the new cartridge package.

• The Pentium® Pro topped out at a 200MHz core speed. The Pentium® II was introduced at a core speed of 233MHz and topped out at 450MHz.

• While the Pentium® Pro did not include the MMX register set or instruction set (with one exception; see “Pentium® II Overdrive Processor” on page 159 on the CD), the Pentium® II added them back in and all subsequent IA32 processors include the MMX capability (see “MMX Capability” on page 519).

• The Pentium® II included power conservation modes that were not implemented on the Pentium® Pro. This topic is covered in “Pentium® II Power Management Features” on page 683.

• The Pentium® Pro yielded less than stellar performance when executing legacy 16-bit code (and Windows 95 included a LOT of legacy code). The Pentium® II was optimized to improve the execution speed of 16-bit code.

• Two new instructions were added to the instruction set. They were the Fast System Call/Return instruction pair (described in “Fast System Call/Return Instruction Pair” on page 708).

• The processor's Backside Bus (BSB) speed was reduced to 50% of the processor core speed.

• The earlier models of the Pentium® II had a FSB speed of 66MHz (the same as the later models of the Pentium® Pro), while the later models increased the FSB speed to 100MHz.

• The Pentium® Pro's FSB arbitration scheme supported up to four processors on the FSB. The Pentium® II supported one or two processors.

• The Pentium® Pro's L1 Code and Data Caches were each 8KB in size. The Pentium® II's L1 cache sizes were increased to 16KB each to make up for slow BSB speed.

• All versions of the Pentium® II had an L2 Cache size of 512KB. There were three variants (in all cases, the BSB ran at 50% of the processor's core speed):

  - The L2 cache only cached from the first 512MB of memory address space and the BSB was not ECC protected.

  - The L2 cache only cached from the first 512MB of memory address space and the BSB was ECC protected.

  - The L2 cache cached from the first 4GB of memory address space and the BSB was ECC protected.

• Later models of the Pentium® II had a hardwired core/FSB frequency ratio, while the earlier models were auto-configured via A20M#, IGNE#, LINT1, and LINT2 sampling on the deassertion of the reset signal (see chapter 3 of the MindShare book entitled Pentium® Pro and Pentium® II System Architecture, Second Edition).

While the hardware-related differences are described in the remainder of this chapter, the power management modes are described in “Pentium® II Power Management Features” on page 683, and the software differences in “Pentium® II Software Enhancements” on page 695.