Chapter 50. Pentium^® 4 FSB Snoop Phase

The Previous Chapter

This chapters provides a detailed description of the Request Phase of a FSB transaction. It includes:

• Introduction to the Request Phase.

• The Source Synchronous Strobes.

• The Request Phase Parity.

• Request Phase Parity Checking.

• ChipSet Request Phase Parity Checking and Reporting.

• Processor Request Phase Parity Checking and Reporting.

• The Request Phase Signal Group is Multiplexed.

• Introduction to the Transaction Types.

• The Contents of Request Packet A.

• 32-bit vs. 36-bit Addresses.

• The Contents of Request Packet B.

This Chapter

This chapter provides a detailed description of the Snoop Phase of a FSB transaction. It includes:

• Agents Involved in the Snoop Phase.

• The Snoop Phase Has Two Purposes.

• The Snoop Result Signals are Shared, DEFER# Isn't.

• The Snoop Phase Duration Is Variable.

• There Is No Snoop Stall Duration Limit.

• Memory Transaction Snooping.

• The Snoop's Effects on Processor Caches.

• Self-Snooping.

• Non-Memory Transactions Have a Snoop Phase.

The Next Chapter

This chapter provides a detailed description of the Response and Data Phases of a FSB transaction. It includes:

• The Purpose of the Response Phase.

• The Response Phase Signal Group.

• The Response Phase Start Point.

• The Response Phase End Point.

• The Response Types.

• The Response Phase May Complete a Transaction.

• The Data Phase Signal Group.

• Five Example Scenarios.

• Data Phase Wait States.

• The Response Phase Parity.

• Data Bus Parity.