The Solution

At the heart of the P6 (and Pentium® 4 and Pentium® M) processors, microcode instructions (referred to as μops) are executed to accomplish the processor's internal operations. The processor's microcode is contained in ROM memory that resides within the processor core. In earlier processors, this ROM was truly read-only—the microcode burned into the ROM at the time of manufacture could not be changed.

Using a special procedure, revised microcode can be automatically loaded into a P6, or Pentium® 4, or Pentium® M processor each time that the system is powered up (or even after it has been powered up). The new microcode can eliminate bugs (what Intel® refers to as errata). When a new revision of microcode is loaded into the processor after the machine is powered up, the silicon level, or stepping, of the processor is effectively raised to match a new stepping of the silicon that is currently being shipped from Intel®'s manufacturing plants. This is a very powerful and extremely cost-effective solution for Intel® and system board manufacturers, as well as the end-user.