Enhanced Branch Prediction

Introduction

The processor design combines three types of predictors:

• The branch prediction mechanism found in the Pentium® 4 processor.

• A Loop Detector.

• An Indirect Branch Predictor.

Intel® estimates that its mispredict rate is 20% lower than earlier designs.

The Loop Detector

Refer to “Enhanced Static Branch Predictor” on page 1095.

The Indirect Branch Predictor

The Problem

The Indirect Branch Predictor deals with indirect branches wherein the branch resolution is dependent on random data. This type of behavior is prevalent in object-oriented code (e.g., C++ and Java) and results in a large number of mispredictions. The typical indirect has a single branch target address, but a data-dependent indirect branch (e.g., a case statement) can have many targets and the target is chosen based on the state of a data item (which can have a number of values).

Indirect Branch Predictor Description

The Indirect Branch Predictor works with the normal branch predictor. When an indirect branch is detected, an entry is created in the BTB containing the following:

• The linear address of the branch instruction.

• The type of branch instruction.

• The branch target address.

When the execution of an indirect branch results in a misprediction due to an incorrect target address, the Indirect Branch Predictor creates another entry in the BTB that records the characteristics of this instance of the indirect branch. In this manner, the BTB allocates a number of entries for the same indirect branch based on the different target addresses it ends up branching to.

Entries in the Indirect Branch Predictor's BTB directory are tagged with the hit and type information to prevent false positives from creating a new source of target mispredictions.