Each Task (including the OS) Has Its Own TSS

When a task switch occurs, the processor automatically loads its segment registers with the values from the new task's TSS. The GDTR register is not loaded with a new value, however. This means that all tasks share the same GDT, but each can select a different set of segment descriptors within the GDT when it is started or resumed (via a task switch).

Switch to an Application Task

If the new task is an application program, the value loaded into the CS register from its TSS selects a code segment descriptor with a DPL of 3. This means the CPL of the task is 3.

A new value is also loaded into CR3, selecting the Page Directory used while the application task is executing. The task's Page Directory and its associated set of Page Tables describes the pages that the task is permitted to access and how it may access them (i.e., read/write or read-only). The task may be permitted to access up to 2²⁰ pages of information (4GB) some of which are present in memory while others remain on mass storage until they are needed.

Switch to an OS Kernel Task

If the new task is the OS, the value loaded into the CS register selects a code segment descriptor with a DPL of 0. This means the CPL of the task 0. A new value is also loaded into CR3, selecting the Page Directory used while the OS task is executing. The task's Page Directory and its associated set of Page Tables describes the pages that the task is permitted to access and how it may access them (but remember that on the 386, a program executing at privilege level 0, 1, or 2 can write to a write-protected page). The task may be permitted to access up to 2²⁰ pages of information (4GB) some of which are present in memory while others remain on mass storage.